Research on low-power neural network computing accelerator

Towards a Low Power Hardware Accelerator for Deep Neural Networks

In this project, we take a first step towards building a low power hardware accelerator for deep learning. We focus on RBM based pretraing of deep neural networks and show that there is significant robustness to random errors in the pre-training, training and testing phase of using such neural networks. We propose to leverage such robustness to build accelerators using low power but possibly un...

Applying Data Compression Techniques on Systolic Neural Network Accelerator

New directions in computing and algorithms has lead to some new applications that have tolerance to imprecision. Although, These applications are creating large volumes of data which exceeds the capability of today’s computing systems. Therefore, researchers are trying to find new techniques to alleviate this crisis. Approximate Computing is one promising technique that uses a trade off between...

A neural network accelerator for image analysis

The Connex Arraytmas a Neural Network Accelerator

We discuss the parallel implementation of neural networks on a Connex ArrayTMcircuit. By estimating the number of memory cycles, we approximate the real performance of the machine. We show how to implement a basic neural learning algorithm. Our preliminary study suggests that the Connex ArrayTMis a good neural network accelerator, due to its high performance for vector operations. The execution...

Low-Power Scientific Computing

Introduction: Scientists and mathematicians are increasingly realizing the computational benefits of using modern, multi-core architectures. In response to this, manufacturers of traditional desktop graphics-processing units (GPUs) have evolved their architectures to create desktop and server GPGPUs (General Purpose Graphics Processing Units). These GPGPUs are quickly becoming the platform of c...